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Micrel, Inc.
Figure 6C. Maximum Driver Power Dissipation
Propagation Delay and Delay Matching and Other
Timing Considerations
Fast propagation delay between the input and output drive
waveform is desirable. It improves overcurrent protection
by decreasing the response time between the control
signal and the MOSFET gate drive. Minimizing
propagation delay also minimizes phase shift errors in
power supplies with wide bandwidth control loops.
Care must be taken to insure the input signal pulse width
is greater than the minimum specified pulse width. An
input signal that is less than the minimum pulse width may
result in no output pulse or an output pulse whose width is
significantly less than the input.
Decoupling and Bootstrap Capacitor Selection
Decoupling capacitors are required for proper operation by
supplying the charge necessary to drive the external
MOSFETs as well as minimizing the voltage ripple on the
supply pins.
Ceramic capacitors are recommended because of their
low impedance and small size. Z5U type ceramic capacitor
dielectrics are not recommended due to the large change
in capacitance over temperature and voltage. A minimum
value of 0.1μf is required for each of the capacitors,
regardless of the MOSFETs being driven. Larger
MOSFETs may require larger capacitance values for
proper operation. The voltage rating of the capacitors
depends upon the supply voltage, ambient temperature
and the voltage derating used for reliability.
MIC44F18/19/20
Placement of the decoupling capacitors is critical. The
bypass capacitor for VDD should be placed as close as
possible between the VDD and VSS pins. The etch
connections must be short, wide and direct. The use of a
ground plane to minimize connection impedance is
recommended. Refer to the section on layout and
component placement for more information.
Grounding, Component Placement and Circuit Layout
Nanosecond switching speeds and ampere peak currents
in and around the MOSFET driver requires proper
placement and trace routing of all components. Improper
placement may cause degraded noise immunity, false
switching and excessive ringing.
Figure 7 shows the critical current paths when the driver
outputs go high and turn on the external MOSFETs. It also
helps demonstrate the need for a low impedance ground
plane. Charge needed to turn-on the MOSFET gates
comes from the decoupling capacitors C VDD . Current in the
gate driver flows from C VDD through the internal driver, into
the MOSFET gate and out the source. The return
connection back to the decoupling capacitor is made
through the ground plane. Any inductance or resistance in
the ground return path causes a voltage spike or ringing to
appear on the source of the MOSFET. This voltage works
against the gate drive voltage and can either slow down or
turn off the MOSFET during the period when it should be
turned on.
IN
Figure 7. Critical Current Paths for High Driver Outputs
February 2011
13
M9999-020111
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